IJRSAT
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I S S N 2319-2690
IJRSAT
International Journal for Research In Science & Advanced Technologies
" Enriching The Research "
International, Peer Reviewed, Open Access Journal
ISSN Approved Journal No. 2319-2690
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DOI Prefix: 10.65726

Publication Details

DESIGN A LIFTING SCHEME BASED AREA AND DELAY OPTIMIZED VLSI ARCHITECTURE FOR DWT
G. Manjula
Year: 2025  |  Volume: 25  |  Issue: 10

Abstract

Wavelet analysis is based on the principle of scale analysis. Actually, according to some wavelet specialists, employing wavelets is akin to taking a certain stance when it comes to data processing. For the purpose of representing data or other functions, wavelets are functions that meet specific mathematical conditions. Utilizing a carry select adder, a separable pipeline architecture is described in this study for the quick computation of the 2D DWT with little space and latency. Appropriate 2-D DWT filtering process design and effective data transfer between 2 D DWT filters yield reduced latency and little area.